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AI初创公司：Paypal Ventures，花旗投资公司财政部AI初创公司|pymnts.com
2025-02-18 22:18:45
Paypal Ventures和Citi Ventures已投资Finmo，这是一家使用AI开发下一代财政部操作系统的初创公司。贝宝风险投资公司和Quona Capital领导的A系列A轮融资将用于产品开发，全球扩展和增强AI功能。此外，PayPal Ventures还投资了保险技术公司OléLife，领导了超额认购的1300万美元B系列回合。Sardine是一家致力于预防金融欺诈的AI初创公司，他在Activant Capital领导的C筹资中筹集了7,000万美元，计划扩展其AI基础设施并打击现代金融犯罪。由OpenAI的支持，Harvey已从红杉和其他人那里获得了3亿美元的D系列资金，旨在通过增强的AI技术来改善律师事务所的工作流程。
Paypal Ventures和Citi Ventures已投资Finmo，这是一家使用AI开发下一代财政部操作系统的初创公司。贝宝风险投资公司和Quona Capital领导的A系列A轮融资将用于产品开发，全球扩展和增强AI功能。此外，PayPal Ventures还投资了保险技术公司OléLife，领导了超额认购的1300万美元B系列回合。Sardine是一家致力于预防金融欺诈的AI初创公司，他在Activant Capital领导的C筹资中筹集了7,000万美元，计划扩展其AI基础设施并打击现代金融犯罪。由OpenAI的支持，Harvey已从红杉和其他人那里获得了3亿美元的D系列资金，旨在通过增强的AI技术来改善律师事务所的工作流程。
Trevor Browne高中的AI课程为学生做准备未来的成功
2025-02-18 22:06:21
西凤凰城的特雷弗·布朗高中（Trevor Browne High School）启动了为期两年的AI课程，该课程融入其工程课程中，为Estrella Mountain Community College提供了学生认证。该计划旨在为学生提供解决现实世界中问题（例如使用AI技术）等现实问题的技能。学生从事涉及模型城市和机器人汽车的项目，同时应对诸如编码错误之类的挑战。校长斯蒂芬妮·街（Stephanie Streeter）强调了通过AI教育为未来的就业市场做准备的重要性，从而提高了他们的职业前景。
西凤凰城的特雷弗·布朗高中（Trevor Browne High School）启动了为期两年的AI课程，该课程融入其工程课程中，为Estrella Mountain Community College提供了学生认证。该计划旨在为学生提供解决现实世界中问题（例如使用AI技术）等现实问题的技能。学生从事涉及模型城市和机器人汽车的项目，同时应对诸如编码错误之类的挑战。校长斯蒂芬妮·街（Stephanie Streeter）强调了通过AI教育为未来的就业市场做准备的重要性，从而提高了他们的职业前景。
通过AI增强模拟解锁Fusion核心的秘密
2025-02-18 21:56:03
麻省理工学院的研究人员正在使用AI增强的模拟来更好地了解ITER等融合设备中的血浆行为，从而更接近可行的融合能。内森·霍华德（Nathan Howard）和他在麻省理工学院（MIT）的等离子科学与融合中心（Fusion Center）的团队使用了包括Cgyro和Portals在内的高级建模框架，以预测各种条件下的等离子体性能。他们最近的研究证实，ITER的基线场景将在完成后按预期工作，但也揭示了一种潜在的替代设置，可以通过降低输入功率实现相似的能量输出，从而提高效率。这些模拟提供了在实际实验开始之前优化融合设备的宝贵见解。
麻省理工学院的研究人员正在使用AI增强的模拟来更好地了解ITER等融合设备中的血浆行为，从而更接近可行的融合能。内森·霍华德（Nathan Howard）和他在麻省理工学院（MIT）的等离子科学与融合中心（Fusion Center）的团队使用了包括Cgyro和Portals在内的高级建模框架，以预测各种条件下的等离子体性能。他们最近的研究证实，ITER的基线场景将在完成后按预期工作，但也揭示了一种潜在的替代设置，可以通过降低输入功率实现相似的能量输出，从而提高效率。这些模拟提供了在实际实验开始之前优化融合设备的宝贵见解。
SANS Institute推出了AI网络安全黑客马拉松
2025-02-18 21:55:05
SANS Institute启动了AI网络安全黑客马拉松，这是一个为期一个月的活动，从2月15日至2025年3月15日，旨在解决AI创新与安全实施之间的差距。黑客马拉松鼓励网络安全专业人员，道德黑客，开发人员和学生开发开源工具，以应对新兴的AI安全挑战。参与者将有机会建立关键的AI驱动安全解决方案，并没有强调并促进高质量的提交作为未来的开源工具。
SANS Institute启动了AI网络安全黑客马拉松，这是一个为期一个月的活动，从2月15日至2025年3月15日，旨在解决AI创新与安全实施之间的差距。黑客马拉松鼓励网络安全专业人员，道德黑客，开发人员和学生开发开源工具，以应对新兴的AI安全挑战。参与者将有机会建立关键的AI驱动安全解决方案，并没有强调并促进高质量的提交作为未来的开源工具。
2025-02-18 21:44:51
AMD's game-changing Strix Halo APU, formally known as the Ryzen AI Max+, poses for new die shots and gets annotated AMD's Strix Halo, powered by Ryzen AI Max, has been unveiled with detailed die shots revealing its advanced engineering. The chip features 16 cores/32 threads based on Zen 5 architecture and a 40 CU iGPU developed using RDNA 3.5. It includes two modified Zen 5 CCDs supporting 3D V-Cache and a large I/O die with an XDNA 2 NPU offering 50 TOPS AI performance. The design also incorporates LPDDR5X memory across a wide interface to address potential bottlenecks, along with advanced multimedia support features. Initial laptops搭载Strix Halo预计本月晚些时候上市，Asus的ROG Flow Z13将于2月25日发布。尽管初期采用率可能缓慢，但随着OEM厂商逐渐接受，未来应用有望增加。 请注意，最后部分出现了一个翻译错误，我将纠正并保持内容为英文摘要： The first laptops powered by Strix Halo are expected to hit shelves later this month, with Asus' ROG Flow Z13 scheduled for a February 25 release. While OEMs have been initially hesitant about adopting these chips, adoption is likely to increase over time despite a slow initial uptake. (Image credit: Tony Yu) AMD's Strix Halo reviews are no longer guarded by an embargo . So we're seeing a wave of new die shots that underline the impressive engineering that went into the design of these chips. Thanks to Kurnal, Asus' Tony Yu (at Bilibili ), and Decap at X (formerly Twitter), we're getting our first look at the internals of Strix Halo, formally known as Ryzen AI Max. Let's get one thing straight: Strix Halo isn't your average run-of-the-mill APU. It wields 16 cores and 32 threads based on the latest Zen 5 architecture, alongside a massive 40 CU (Compute Unit) iGPU (integrated GPU). The package itself is composed of two Zen 5 CCDs, which are a tad different from the ones you see on Granite Ridge (Ryzen 9000 CPUs). Surrounding the chip are up to eight memory ICs, enabling support for 128GB of unified memory. Thanks to high-res images from Tony Yu, we see that AMD has trimmed the D2D (Die to Die) interfaces between the CCD and I/O die by roughly 2mm. Although the CCDs have been tweaked slightly at 67.07mm 2 , they still support 3D V-Cache, evidenced by the TSV connections in the die shots. The rest is similar to what you'd typically find on a desktop Zen 5 processor. Each of the eight cores carries 8MB of dedicated L2 cache, with a shared 32MB L3 pool in between. Beneath the two CCDs lies a large I/O die that hosts the uncore part of the chip. The bulk of the 307.58mm 2 die size is occupied by the 40 Compute Unit integrated GPU (20 WGPs) developed using RDNA 3.5. Slapping on more cores is only beneficial if they can be fed with data. We've seen firsthand how the performance of Strix Point (with 16 CUs) was hampered due to memory bottlenecks. AMD has taken a two-pronged solution to counteract this issue, with fast LPDDR5X memory across a wide 256-bit interface (eight 32-bit controllers) to the sides of the chip, and 32MB of MALL (Memory Access at Last Level) or LLC (Last Level Cache) split evenly across both sides of the iGPU. Image 1 of 5 (Image credit: Tony Yu) To the left of the iGPU lies the XDNA 2 NPU (Neural Processing Unit), enabling 50 TOPS of AI performance, claimed to outclass even the RTX 4090. Some locations have been left unmarked. Either way, the bottom of the I/O die features a single PCIe 4.0 x16 interface, alongside USB 4 (40 Gbps), USB 3.2 Gen 2, and USB 2.0 controllers, followed by a Display Engine and two Media Engines with support for H.264, H.265, and AV1 codecs. Based on the provided statistics, the full chip equals roughly 441.72mm 2 or allegedly 475mm 2 . That's including what appears to be structural silicon. The first laptops powered by Strix Halo should hit shelves later this month, with Asus' ROG Flow Z13 tipped for a February 25 launch. While OEMs have initially been hesitant to jump on board with these chips, adoption is likely to improve, despite a slow initial uptake. Get Tom's Hardware's best news and in-depth reviews, straight to your inbox. Hassam Nasir is a die-hard hardware enthusiast with years of experience as a tech editor and writer, focusing on detailed CPU comparisons and general hardware news. When heâs not working, youâll find him bending tubes for his ever-evolving custom water-loop gaming rig or benchmarking the latest CPUs and GPUs just for fun.
AMD's game-changing Strix Halo APU, formally known as the Ryzen AI Max+, poses for new die shots and gets annotated AMD's Strix Halo, powered by Ryzen AI Max, has been unveiled with detailed die shots revealing its advanced engineering. The chip features 16 cores/32 threads based on Zen 5 architecture and a 40 CU iGPU developed using RDNA 3.5. It includes two modified Zen 5 CCDs supporting 3D V-Cache and a large I/O die with an XDNA 2 NPU offering 50 TOPS AI performance. The design also incorporates LPDDR5X memory across a wide interface to address potential bottlenecks, along with advanced multimedia support features. Initial laptops搭载Strix Halo预计本月晚些时候上市，Asus的ROG Flow Z13将于2月25日发布。尽管初期采用率可能缓慢，但随着OEM厂商逐渐接受，未来应用有望增加。 请注意，最后部分出现了一个翻译错误，我将纠正并保持内容为英文摘要： The first laptops powered by Strix Halo are expected to hit shelves later this month, with Asus' ROG Flow Z13 scheduled for a February 25 release. While OEMs have been initially hesitant about adopting these chips, adoption is likely to increase over time despite a slow initial uptake. (Image credit: Tony Yu) AMD's Strix Halo reviews are no longer guarded by an embargo . So we're seeing a wave of new die shots that underline the impressive engineering that went into the design of these chips. Thanks to Kurnal, Asus' Tony Yu (at Bilibili ), and Decap at X (formerly Twitter), we're getting our first look at the internals of Strix Halo, formally known as Ryzen AI Max. Let's get one thing straight: Strix Halo isn't your average run-of-the-mill APU. It wields 16 cores and 32 threads based on the latest Zen 5 architecture, alongside a massive 40 CU (Compute Unit) iGPU (integrated GPU). The package itself is composed of two Zen 5 CCDs, which are a tad different from the ones you see on Granite Ridge (Ryzen 9000 CPUs). Surrounding the chip are up to eight memory ICs, enabling support for 128GB of unified memory. Thanks to high-res images from Tony Yu, we see that AMD has trimmed the D2D (Die to Die) interfaces between the CCD and I/O die by roughly 2mm. Although the CCDs have been tweaked slightly at 67.07mm 2 , they still support 3D V-Cache, evidenced by the TSV connections in the die shots. The rest is similar to what you'd typically find on a desktop Zen 5 processor. Each of the eight cores carries 8MB of dedicated L2 cache, with a shared 32MB L3 pool in between. Beneath the two CCDs lies a large I/O die that hosts the uncore part of the chip. The bulk of the 307.58mm 2 die size is occupied by the 40 Compute Unit integrated GPU (20 WGPs) developed using RDNA 3.5. Slapping on more cores is only beneficial if they can be fed with data. We've seen firsthand how the performance of Strix Point (with 16 CUs) was hampered due to memory bottlenecks. AMD has taken a two-pronged solution to counteract this issue, with fast LPDDR5X memory across a wide 256-bit interface (eight 32-bit controllers) to the sides of the chip, and 32MB of MALL (Memory Access at Last Level) or LLC (Last Level Cache) split evenly across both sides of the iGPU. Image 1 of 5 (Image credit: Tony Yu) To the left of the iGPU lies the XDNA 2 NPU (Neural Processing Unit), enabling 50 TOPS of AI performance, claimed to outclass even the RTX 4090. Some locations have been left unmarked. Either way, the bottom of the I/O die features a single PCIe 4.0 x16 interface, alongside USB 4 (40 Gbps), USB 3.2 Gen 2, and USB 2.0 controllers, followed by a Display Engine and two Media Engines with support for H.264, H.265, and AV1 codecs. Based on the provided statistics, the full chip equals roughly 441.72mm 2 or allegedly 475mm 2 . That's including what appears to be structural silicon. The first laptops powered by Strix Halo should hit shelves later this month, with Asus' ROG Flow Z13 tipped for a February 25 launch. While OEMs have initially been hesitant to jump on board with these chips, adoption is likely to improve, despite a slow initial uptake. Get Tom's Hardware's best news and in-depth reviews, straight to your inbox. Hassam Nasir is a die-hard hardware enthusiast with years of experience as a tech editor and writer, focusing on detailed CPU comparisons and general hardware news. When heâs not working, youâll find him bending tubes for his ever-evolving custom water-loop gaming rig or benchmarking the latest CPUs and GPUs just for fun.
Palantir今天跳了 - 热热的人工智能（AI）股票仍然是购买吗？
2025-02-18 21:41:06
众议员Marjorie Taylor Greene在公司购买了新股后，Palantir的股票在周二上涨了4.6％。Palantir的市值已达到约2840亿美元，估值约为今年的预期收益和预期销售的75倍。尽管由于其高增长依赖性估值，但鉴于该公司的可扩展业务模式并领导了针对私营和政府部门的AI软件产品，但长期投资者的风险很高。但是，应谨慎对待投资以美元成本的策略进行。palantir
众议员Marjorie Taylor Greene在公司购买了新股后，Palantir的股票在周二上涨了4.6％。Palantir的市值已达到约2840亿美元，估值约为今年的预期收益和预期销售的75倍。尽管由于其高增长依赖性估值，但鉴于该公司的可扩展业务模式并领导了针对私营和政府部门的AI软件产品，但长期投资者的风险很高。但是，应谨慎对待投资以美元成本的策略进行。palantir
AI Services电信公司的魔术收入子弹是吗？
2025-02-18 21:10:16
电信公司正在探索AI作为传统5G货币化之外的新收入来源。NVIDIA的克里斯·彭罗斯（Chris Penrose）概述了三个主要机会：提供gpus-as-a-service，提供数据策展和模型培训等平台服务，并进入诸如客户体验平台之类的应用程序服务。电信公司旨在利用电信行业的基础设施和专业知识来吸引企业客户和政府合作伙伴寻求AI能力。像AMDOC这样的公司正在开发工具，以促进电信公司进入AI驱动的收入流，并期望具有巨大的增长潜力。
电信公司正在探索AI作为传统5G货币化之外的新收入来源。NVIDIA的克里斯·彭罗斯（Chris Penrose）概述了三个主要机会：提供gpus-as-a-service，提供数据策展和模型培训等平台服务，并进入诸如客户体验平台之类的应用程序服务。电信公司旨在利用电信行业的基础设施和专业知识来吸引企业客户和政府合作伙伴寻求AI能力。像AMDOC这样的公司正在开发工具，以促进电信公司进入AI驱动的收入流，并期望具有巨大的增长潜力。
法庭文件中的AI“幻觉”给律师带来麻烦
2025-02-18 20:55:51
美国人身伤害律师事务所Morgan＆Morgan警告其律师在联邦法官威胁沃尔玛诉讼中对虚拟引用的制裁之后，使用AI发明假案例法的风险。自2023年以来，法院在至少七个案件中对律师进行了纪律处分或质疑的律师，随着高级AI工具在法律工作中变得更加普遍，强调了新的诉讼风险。
美国人身伤害律师事务所Morgan＆Morgan警告其律师在联邦法官威胁沃尔玛诉讼中对虚拟引用的制裁之后，使用AI发明假案例法的风险。自2023年以来，法院在至少七个案件中对律师进行了纪律处分或质疑的律师，随着高级AI工具在法律工作中变得更加普遍，强调了新的诉讼风险。
独家：埃隆·马斯克（Elon Musk）工作人员创建了一名Doge AI助手，以使政府“少愚蠢”
2025-02-18 20:49:16
据报道，由高级埃隆·马斯克（Elon Musk）工作人员开发的定制AI聊天机器人据称由XAI提供支持，据称可以协助虚构的政府效率部（DOGE）消除浪费。它旨在通过五个指导原则（例如简化要求和消除不必要的流程）来提高政府效率。聊天机器人展示了幻觉和建议不一致的问题，但也建议模仿玛格丽特·撒切尔（Margaret Thatcher）和李·库恩（Lee Kuan Yew）等领导者，因为他们专注于效率和技术使用。它的部署提出了有关其实验性质和潜在利益冲突的问题。
据报道，由高级埃隆·马斯克（Elon Musk）工作人员开发的定制AI聊天机器人据称由XAI提供支持，据称可以协助虚构的政府效率部（DOGE）消除浪费。它旨在通过五个指导原则（例如简化要求和消除不必要的流程）来提高政府效率。聊天机器人展示了幻觉和建议不一致的问题，但也建议模仿玛格丽特·撒切尔（Margaret Thatcher）和李·库恩（Lee Kuan Yew）等领导者，因为他们专注于效率和技术使用。它的部署提出了有关其实验性质和潜在利益冲突的问题。
援助组织和政府的先进洪水中心特征
2025-02-18 20:35:03
Google Research正在使用卫星图像来推进AI驱动的洪水预测，以提高全球可靠性和覆盖范围。洪水枢纽的新功能包括用于了解洪水风险的淹没历史图和每个量表的盆地视图，用于跟踪特定位置。该更新旨在为援助组织，政府和研究人员提供颗粒状的洪水信息。尼日利亚和孟加拉国的国际救援委员会（IRC）之类的合作表明，AI在洪水袭击之前至少5-7天可以为社区提供先发制人的救济，增强弹性并降低灾难应对成本。
Google Research正在使用卫星图像来推进AI驱动的洪水预测，以提高全球可靠性和覆盖范围。洪水枢纽的新功能包括用于了解洪水风险的淹没历史图和每个量表的盆地视图，用于跟踪特定位置。该更新旨在为援助组织，政府和研究人员提供颗粒状的洪水信息。尼日利亚和孟加拉国的国际救援委员会（IRC）之类的合作表明，AI在洪水袭击之前至少5-7天可以为社区提供先发制人的救济，增强弹性并降低灾难应对成本。